AT32UC3L064_1 ATMEL [ATMEL Corporation], AT32UC3L064_1 Datasheet - Page 463

• Manufacturer Part Number: AT32UC3L064_1
• Description: AVR32 32-bit Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

21.8.2
Name:
Access Type:
Offset:
Reset Value:
• DLYBCS: Delay Between Chip Selects
• PCS: Peripheral Chip Select
• LLB: Local Loopback Enable
• RXFIFOEN: FIFO in Reception Enable
32099A–AVR32–06/09
LLB
31
23
15
7
-
-
This field defines the delay from NPCS inactive to the activation of another NPCS. The DLYBCS time guarantees non-
overlapping chip selects and solves bus contentions in case of peripherals having long data float times.
If DLYBCS is less than or equal to six, six CLK_SPI periods will be inserted by default.
Otherwise, the following equation determines the delay:
This field is only used if Fixed Peripheral Select is active (PS = 0).
If PCSDEC = 0:
PCS = xxx0NPCS[3:0] = 1110
PCS = xx01NPCS[3:0] = 1101
PCS = x011NPCS[3:0] = 1011
PCS = 0111NPCS[3:0] = 0111
PCS = 1111forbidden (no peripheral is selected)
(x = don’t care)
If PCSDEC = 1:
NPCS[3:0] output signals = PCS.
1: Local loopback path enabled. LLB controls the local loopback on the data serializer for testing in master mode only (MISO is
internally connected on MOSI).
0: Local loopback path disabled.
1: The FIFO is used in reception (four characters can be stored in the SPI).
Delay Between Chip Selects
Mode Register
RXFIFOEN
30
22
14
6
-
-
MR
Read/Write
0x04
0x00000000
WDRBT
29
21
13
5
-
-
=
DLYBCS
---------------------- -
CLKSPI
MODFDIS
28
20
12
4
-
-
DLYBCS
27
19
11
3
-
-
PCSDEC
26
18
10
2
-
PCS
PS
25
17
9
1
-
AT32UC3L
MSTR
24
16
8
0
-
463