AT32UC3L064_1 ATMEL [ATMEL Corporation], AT32UC3L064_1 Datasheet - Page 317

• Manufacturer Part Number: AT32UC3L064_1
• Description: AVR32 32-bit Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

18.4.2
18.4.3
18.4.4
18.5
18.5.1
32099A–AVR32–06/09
Functional Description
Clocks
Debug Operation
Interrupts
Reference Clock
The clock for the FREQM bus interface (CLK_FREQM) is generated by the Power Manager.
This clock is enabled at reset, and can be disabled in the Power Manager. It is recommended to
disable the FREQM before disabling the clock, to avoid freezing the FREQM ia an undefined
state.
A set of clocks can be selected as reference (CLK_REF) and another set of clocks can be
selected for measurement (CLK_MSR). Please refer to the CLKSEL and REFSEL tables in the
Module Configuration chapter for details.
When an external debugger forces the CPU into debug mode, the FREQM continues normal
operation. If the FREQM is configured in a way that requires it to be periodically serviced by the
CPU through interrupts or similar, improper operation or data loss may result during debugging.
The FREQM interrupt request line is connected to the internal source of the interrupt controller.
Using the FREQM interrupt requires the interrupt controller to be programmed first.
The FREQM accuratly measures the frequency of a clock by comparing the frequency to a
known frequency:
The Reference Clock Selection (REFSEL) field in the Mode Register (MODE) selects the clock
source for CLK_REF. The reference clock is enabled by writing a one to the Reference Clock
Enable (REFCEN) bit in the Mode Register. This clock should have a known frequency.
CLK_REF needs to be disabled before switching to another clock. The RCLKBUSY bit in the
Status Register (SR) indicates whether the clock is busy or not. This bit is set when the
MODE.REFCEN bit is written.
To change CLK_REF:
To enable CLK_REF:
To disable CLK_REF:
• Write a zero to the MODE.REFCEN bit to disable the clock, without changing the other
• Wait until the SR.RCLKBUSY bit reads as zero.
• Change the MODE.REFSEL field.
• Write a one to the MODE.REFCEN bit to enable the clock, without changing the other
• Wait until the SR.RCLKBUSY bit reads as zero.
• Write the correct value to the MODE.REFSEL field.
• Write a one to the MODE.REFCEN to enable the clock, without changing the other bits/fields
• Wait until the SR.RCLKBUSY bit reads as zero.
bits/fields in the Mode Register.
bits/fields in the Mode Register.
in the Mode Register.
f
CLK_MSR
= (VALUE/REFNUM)*f
CLK_REF
AT32UC3L
317