r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 869

• Manufacturer Part Number: r4f2426
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

15.3.3
TDR is an 8-bit register that stores transmit data. When the SCI detects that TSR is empty, it
transfers the transmit data written in TDR to TSR and starts transmission. The double-buffered
structures of TDR and TSR enable continuous serial transmission. If the next transmit data has
already been written to TDR during serial transmission, the SCI transfers the written data to TSR
to continue transmission. Although TDR can be read or written to by the CPU at all times, to
achieve reliable serial transmission, write transmit data to TDR for only once after confirming that
the TDRE bit in SSR is set to 1.
15.3.4
TSR is a shift register that transmits serial data. To perform serial data transmission, the SCI first
transfers transmit data from TDR to TSR, then sends the data to the TxD pin starting. TSR cannot
be directly accessed by the CPU.
15.3.5
SMR is used to set the SCI’s serial transfer format and select the on-chip baud rate generator clock
source. Some bit functions of SMR differ in normal serial communication interface mode and
Smart Card interface mode.
Normal Serial Communication Interface Mode (When SMIF bit in SCMR is 0)
Bit
7
6
Bit Name
C/A
CHR
Transmit Data Register (TDR)
Transmit Shift Register (TSR)
Serial Mode Register (SMR)
Initial Value
0
0
R/W
R/W
R/W
Description
Communication Mode
0: Asynchronous mode
1: Clocked synchronous mode
Character Length (enabled only in asynchronous
mode)
0: Selects 8 bits as the data length.
1: Selects 7 bits as the data length. LSB-first is
In clocked synchronous mode, a fixed data length
of 8 bits is used.
Section 15 Serial Communication Interface (SCI, IrDA)
fixed and the MSB (bit 7) of TDR is not
transmitted in transmission.
Rev. 1.00 Sep. 19, 2008 Page 841 of 1270
REJ09B0466-0100