r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 198

• Manufacturer Part Number: r4f2426
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

Section 6 Bus Controller (BSC)
Rev. 1.00 Sep. 19, 2008 Page 170 of 1270
REJ09B0466-0100
Bit
6
5
Bit Name
RCDM
DDS
Initial Value
0
0
R/W
R/W
R/W
Description
RAS Down Mode
When access to DRAM space is interrupted by an
access to normal space, an access to an internal
I/O register, etc., this bit selects whether the RAS
signal is held low while waiting for the next DRAM
access (RAS down mode), or is driven high again
(RAS up mode). The setting of this bit is valid only
when the BE bit is set to 1.
If this bit is cleared to 0 when set to 1 in the RAS
down state, the RAS down state is cleared at that
point, and RAS goes high.
When continuous synchronous DRAM space is
set, reading from and writing to this bit is enabled.
However, the setting does not affect the operation.
0: RAS up mode selected for DRAM space access
1: RAS down mode selected for DRAM space
DMAC Single Address Transfer Option
Selects whether full access is always performed or
burst access is enabled when DMAC single
address transfer is performed on the
DRAM/synchronous DRAM.
When the BE bit is cleared to 0 in DRAMCR,
disabling DRAM/synchronous DRAM burst
access, DMAC single address transfer is
performed in full access mode regardless of the
setting of this bit.
This bit has no effect on other bus master external
accesses or DMAC dual address transfers.
0: Full access is always executed
1: Burst access is enabled
access