r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 1002

• Manufacturer Part Number: r4f2426
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

Section 17 A/D Converter
17.4.2
In scan mode, A/D conversion is to be performed sequentially on the analog inputs of the specified
channels up to four or eight* channels. Two types of scan mode are provided, that is, continuous
scan mode where A/D conversion is repeatedly performed and one-cycle scan mode where A/D
conversion is performed for the specified channels for one cycle.
(1)
1. When the ADST bit in ADCSR is set to 1 by software, TPU, TMR, or an external trigger
2. When A/D conversion for each channel is completed, the A/D conversion result is sequentially
3. When A/D conversion of all selected channels is completed, the ADF bit in ADCSR is set to 1.
4. The ADST bit is not cleared automatically, and steps 2 to 3 are repeated as long as the ADST
Note: * Only possible in the H8S/2426 group and H8S/2426R group.
Rev. 1.00 Sep. 19, 2008 Page 974 of 1270
REJ09B0466-0100
input, A/D conversion starts on the first channel in the specified channel group. Consecutive
A/D conversion on a maximum of four channels (SCANE and SCANS = B'10) or on a
maximum of eight channels (SCANE and SCANS = B'11) can be selected. When consecutive
A/D conversion is performed on four channels, A/D conversion starts on AN0 when CH3 and
CH2 of unit 0 = B'00, on AN4 when CH3 and CH2 of unit 1 = B'01, on AN8* when CH3 and
CH2 of unit 1 = B'10, or on AN12 when CH3 and CH2 of unit 1= B'11. When consecutive
A/D conversion is performed on eight channels, A/D conversion starts on AN0 when CH3 =
B'0 or on AN8* when CH3 = B'1.
transferred to the corresponding ADDR of each channel.
If the ADIE bit is set to 1 at this time, an ADI interrupt request is generated. A/D conversion of
the first channel in the group starts again.
bit remains set to 1. When the ADST bit is cleared to 0, A/D conversion stops and the A/D
converter enters wait state. If the ADST bit is later set to 1, A/D conversion starts again from
the first channel in the group.
Continuous Scan Mode
Scan Mode