r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 229
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r4f2426
Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R4F2426.pdf
(1302 pages)
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6.5.6
Some external I/O devices require a setup time and hold time between address and CS signals and
strobe signals such as RD, HWR, and LWR. Settings can be made in the CSACR register to insert
states in which only the CS, AS, and address signals are asserted before and after a basic bus space
access cycle. Extension of the CS assertion period can be set for individual areas. With the CS
assertion extension period in write access, the data setup and hold times are less stringent since the
write data is output to the data bus.
Figure 6.20 shows an example of the timing when the CS assertion period is extended in basic bus
3-state access space.
Read
(when
RDNn = 0)
Write
Figure 6.20 Example of Timing when Chip Select Assertion Period Is Extended
Extension of Chip Select (CS) Assertion Period
φ
Address bus
CSn
AS
RD
Data bus
HWR, LWR
Data bus
T
h
T
1
Bus cycle
Rev. 1.00 Sep. 19, 2008 Page 201 of 1270
T
Write data
2
Section 6 Bus Controller (BSC)
Read data
T
3
REJ09B0466-0100
T
t
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