r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 20

• Manufacturer Part Number: r4f2426
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

11.5 Interrupt Sources................................................................................................................ 750
11.6 DTC Activation.................................................................................................................. 753
11.7 DMAC Activation.............................................................................................................. 753
11.8 A/D Converter Activation.................................................................................................. 754
11.9 Operation Timing............................................................................................................... 754
11.10 Usage Notes ....................................................................................................................... 762
Section 12 Programmable Pulse Generator (PPG) ............................................ 773
12.1 Features.............................................................................................................................. 773
12.2 Input/Output Pins............................................................................................................... 775
12.3 Register Descriptions ......................................................................................................... 775
12.4 Operation ........................................................................................................................... 784
Rev. 1.00 Sep. 19, 2008 Page xx of xxviii
11.4.5 PWM Modes......................................................................................................... 737
11.4.6
11.9.1
11.9.2
11.10.1 Module Stop Mode Setting ................................................................................. 762
11.10.2 Input Clock Restrictions ..................................................................................... 762
11.10.3 Caution on Cycle Setting .................................................................................... 763
11.10.4 Contention between TCNT Write and Clear Operations .................................... 763
11.10.5 Contention between TCNT Write and Increment Operations............................. 764
11.10.6 Contention between TGR Write and Compare Match ........................................ 765
11.10.7 Contention between Buffer Register Write and Compare Match ....................... 766
11.10.8 Contention between TGR Read and Input Capture............................................. 767
11.10.9 Contention between TGR Write and Input Capture............................................ 768
11.10.10 Contention between Buffer Register Write and Input Capture ........................... 769
11.10.11 Contention between Overflow/Underflow and Counter Clearing....................... 770
11.10.12 Contention between TCNT Write and Overflow/Underflow.............................. 771
11.10.13 Multiplexing of I/O Pins ..................................................................................... 771
11.10.14 Interrupts and Module Stop Mode ...................................................................... 771
12.3.1
12.3.2
12.3.3
12.3.4
12.3.5
12.4.1
12.4.2
12.4.3
12.4.4
12.4.5
Phase Counting Mode......................................................................................... 743
Input/Output Timing ........................................................................................... 754
Interrupt Signal Timing ...................................................................................... 758
Next Data Enable Registers H, L (NDERH, NDERL) ....................................... 776
Output Data Registers H, L (PODRH, PODRL)................................................. 777
Next Data Registers H, L (NDRH, NDRL) ........................................................ 778
PPG Output Control Register (PCR) .................................................................. 781
PPG Output Mode Register (PMR) .................................................................... 782
Output Timing .................................................................................................... 785
Sample Setup Procedure for Normal Pulse Output............................................. 786
Example of Normal Pulse Output (Example of Five-Phase Pulse Output)......... 787
Non-Overlapping Pulse Output........................................................................... 788
Sample Setup Procedure for Non-Overlapping Pulse Output ............................. 790