r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 57
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r4f2426
Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R4F2426.pdf
(1302 pages)
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Type
Clock
Operating
mode
control
System
control
Symbol
SDRAMφ*
MD2
MD1
MD0
RES
STBY
EMLE
BSCANE*
1
2
FP-144LV
36
1
144
143
92
103
32
H8S/2426, H8S/2426R
TLP-145V
M1
B1
A2
A3
G12
D13
K1
L9
Pin No.
H8S/2424
FP-120BV
1
120
119
77
88
30
Rev. 1.00 Sep. 19, 2008 Page 29 of 1270
I/O
Output When a synchronous DRAM
Input
Input
Input
Input
Input
Function
is connected, this pin is
connected to the CLK pin of
the synchronous DRAM. For
details, refer to section 6, Bus
Controller (BSC).
These pins set the operating
mode. These pins should not
be changed during operation.
driven low, the chip is reset.
transition is made to hardware
standby mode.
When the on-chip emulator is
used, this pin should be fixed
high. At this time, pins P53,
PG4 to PG6, and WDTOVF
are used exclusively by the
on-chip emulator. Therefore,
the corresponding pin
functions of those pins are not
available. When the on-chip
emulator is not used, this pin
should be fixed low.
When the boundary scan
function is used, this pin
should be fixed high. At this
time, pins P53, PG4 to PG6,
and WDTOVF are used
Reset pin. When this pin is
When this pin is driven low, a
On-chip emulator enable pin.
Boundary scan enable pin.
exclusively for boundary scan.
Therefore, the corresponding
pin functions of those pins are
not available. When the
boundary scan function is not
used, this pin should be fixed
low.
Section 1 Overview
REJ09B0466-0100
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