r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 212
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r4f2426
Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R4F2426.pdf
(1302 pages)
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Section 6 Bus Controller (BSC)
Table 6.2
(n = 0 to 7)
(4)
RDNCR can be used to select either of two negation timings (at the end of the read cycle or one
half-state before the end of the read cycle) for the read strobe (RD) used in the basic bus interface
space.
(5)
Some external I/O devices require a setup time and hold time between address and CS signals and
strobe signals such as RD, HWR, and LWR. CSACR can be used to insert states in which only the
CS, AS, and address signals are asserted before and after a basic bus space access cycle.
Rev. 1.00 Sep. 19, 2008 Page 184 of 1270
REJ09B0466-0100
ABWCR
ABWn
0
1
Read Strobe Timing
Chip Select (CS) Assertion Period Extension States
Bus Specifications for Each Area (Basic Bus Interface)
ASTCR
ASTn
0
1
0
1
Wn2
0
1
0
1
WTCRA, WTCRB
Wn1
0
1
0
1
0
1
0
1
Wn0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Bus Width
16
8
Bus Specifications (Basic Bus Interface)
Access
States
2
3
2
3
Program Wait
States
0
0
1
2
3
4
5
6
7
0
0
1
2
3
4
5
6
7
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