r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 197

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r4f2426

Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Bit
10
9
8
7
Bit Name
RMTS2
RMTS1
RMTS0
BE
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
DRAM/Continuous Synchronous DRAM Space
Select
These bits designate DRAM/continuous
synchronous DRAM space for areas 2 to 5.
When continuous DRAM space is set, it is
possible to connect large-capacity DRAM
exceeding 2 Mbytes per area. In this case, the
RAS signal is output from the CS2 pin.
When continuous synchronous DRAM space is
set, it is possible to connect large-capacity
synchronous DRAM exceeding 2 Mbytes per area.
In this case, the RAS, CAS, and WE signals are
output from CS2, CS3, and CS4 pins,
respectively. When synchronous DRAM mode is
set, the mode registers of the synchronous DRAM
can be set.
000: Normal space
001: Normal space in areas 3 to 5
010: Normal space in areas 4 and 5
011: DRAM space in areas 2 to 5
100: Continuous synchronous DRAM space
101: Synchronous DRAM mode setting (setting
110: Setting prohibited
111: Continuous DRAM space in areas 2 to 5
Burst Access Enable
Selects enabling or disabling of burst access to
areas designated as DRAM/continuous
synchronous DRAM space. DRAM/continuous
synchronous DRAM space burst access is
performed in fast page mode. When using EDO
page mode DRAM, the OE signal must be
connected.
0: Full access
1: Access in fast page mode
DRAM space in area 2
DRAM space in areas 2 and 3
(setting possible only in H8S/2426R Group)
possible only in H8S/2426R Group)
Rev. 1.00 Sep. 19, 2008 Page 169 of 1270
Section 6 Bus Controller (BSC)
REJ09B0466-0100

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