r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 1146
r4f2426
Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R4F2426.pdf
(1302 pages)
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Section 24 Power-Down Modes
24.3
Output of the φ clock can be controlled by means of the PSTOP bit in SCKCR, and DDR for the
corresponding port. When the PSTOP bit is set to 1, the φ clock stops at the end of the bus cycle,
and φ output goes high. φ clock output is enabled when the PSTOP bit is cleared to 0. When DDR
for the corresponding port is cleared to 0, φ clock output is disabled and input port mode is set.
Table 24.4 shows the state of the φ pin in each processing state.
Table 24.4 φ Pin State in Each Processing State
Rev. 1.00 Sep. 19, 2008 Page 1118 of 1270
REJ09B0466-0100
Register Setting
DDR
0
1
1
PSTOP
X
0
1
φ Clock Output Control
Normal
Operating State Sleep Mode
High impedance
φ output
Fixed high
High impedance High impedance
φ output
Fixed high
Software
Standby Mode
Fixed high
Fixed high
Hardware
Standby Mode
High impedance
High impedance
High impedance
All Module
Clocks Stop
Mode
High
impedance
φ output
Fixed high
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