r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 251

• Manufacturer Part Number: r4f2426
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

If a row address hold time or read access time is necessary, making a setting in bits RCD1 and
RCD0 in DRACCR allows from one to three T
to be inserted between the T
the column address is output. Use the setting that gives the optimum row address signal hold time
relative to the falling edge of the RAS signal according to the DRAM connected and the operating
frequency of this LSI. Figure 6.36 shows an example of the timing when one T
Read
Write
Note: n = 2 to 5
Figure 6.36 Example of Timing with One Row Address Output Maintenance State
φ
Address bus
RASn (CSn)
UCAS, LCAS
WE (HWR)
OE (RD)
Data bus
WE (HWR)
OE (RD)
Data bus
r
cycle, in which the RAS signal goes low, and the T
T
p
(RAST = 0, CAST = 0)
Row address
T
r
rw
states, in which row address output is maintained,
T
rw
Rev. 1.00 Sep. 19, 2008 Page 223 of 1270
High
High
T
Section 6 Bus Controller (BSC)
Column address
c1
rw
c1
state is set.
cycle, in which
REJ09B0466-0100
T
c2