r4f2426 Renesas Electronics Corporation., r4f2426 Datasheet - Page 405

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r4f2426

Manufacturer Part Number
r4f2426
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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A byte or word transfer is performed for a single transfer request, and after the transfer, the bus is
released. While the bus is released, one or more bus cycles are executed by the CPU or DTC.
In the transfer end cycle (the cycle in which the transfer counter reaches 0), a one-state DMA dead
cycle is inserted after the DMA write cycle.
(3)
Set the DTA bit in DMABCRH to 1 for the channel for which the DREQ pin is selected.
Figure 7.30 shows an example of single address mode transfer activated by the DREQ pin falling
edge.
Address bus
DREQ Pin Falling Edge Activation Timing
DACK
TEND
HWR
LWR
φ
Figure 7.29 Example of Single Address Mode Transfer (Word Write)
release
Bus
DMA write
release
Bus
DMA write
Rev. 1.00 Sep. 19, 2008 Page 377 of 1270
release
Bus
Section 7 DMA Controller (DMAC)
Last transfer
DMA write
cycle
REJ09B0466-0100
DMA
dead
release
Bus

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