mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 85

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mc68hc908ld64

Manufacturer Part Number
mc68hc908ld64
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
6.6.2 Stop Mode
6.7 CPU During Break Interrupts
6.8 Instruction Set Summary
6.9 Opcode Map
MC68HC908LD64
Freescale Semiconductor
Rev. 3.0
The STOP instruction:
After exiting stop mode, the CPU clock begins running after the oscillator
stabilization delay.
If the break module is enabled, a break interrupt causes the CPU to
execute the software interrupt instruction (SWI) at the completion of the
current CPU instruction. (See
program counter vectors to $FFFC–$FFFD ($FEFC–$FEFD in monitor
mode).
A return-from-interrupt instruction (RTI) in the break routine ends the
break interrupt and returns the MCU to normal operation if the break
interrupt has been deasserted.
Table 6-1
The opcode map is provided in
Clears the interrupt mask (I bit) in the condition code register,
enabling external interrupts. After exit from stop mode by external
interrupt, the I bit remains clear. After exit by reset, the I bit is set.
Disables the CPU clock.
provides a summary of the M68HC08 instruction set.
Central Processor Unit (CPU)
Section 23. Break Module
Table
6-2.
Central Processor Unit (CPU)
CPU During Break Interrupts
(BRK).) The
Data Sheet
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