mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 239

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mc68hc908ld64

Manufacturer Part Number
mc68hc908ld64
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
16.6.2 DDC2 Address Register (DDC2ADR)
MC68HC908LD64
Freescale Semiconductor
Rev. 3.0
Address:
EXTAD — DDC Expanded Address
D2AD[7:1] — DDC2 Address
Reset:
Read:
Write:
This bit is set to expand the address of the DDC in slave mode. When
set, the DDC will acknowledge the general call address $00 and the
matched 4-bit address, DAD[7:4]. Reset clears this bit.
For example, when DDCADR is configured as:
The DDC module will respond to the calling address:
or the general calling address:
where X = don’t care; bit 0 of the calling address is the MRW bit from
the calling master.
These seven bits represent the second slave address for the DDC2BI
protocol. D2AD[7:1] should be set to the same value as DAD[7:1] in
DDCADR if user application do not use DDC2BI. Reset clears all bits
this register.
1 = DDC responds to address $00 and $DAD[7:4]
0 = DDC responds to address $DAD[7:1]
DAD7
D2AD7
$001C
Bit 7
Bit 7
Figure 16-3. DDC2 Address Register (DDC2ADR)
1
1
0
0
DDC12AB Interface
DAD6
D2AD6
1
6
1
0
6
0
DAD5
D2AD5
0
5
0
0
5
0
D2AD4
DAD4
1
4
1
0
4
0
DAD3
D2AD3
X
X
3
0
3
0
DAD2
D2AD2
X
X
2
0
2
0
DDC12AB Interface
D2AD1
DAD1
Bit 1
X
X
0
1
0
DDC Registers
Data Sheet
EXTAD
Bit 0
1
0
0
239

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