mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 308

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mc68hc908ld64

Manufacturer Part Number
mc68hc908ld64
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Input/Output (I/O) Ports
Data Sheet
308
NOTE:
DDRD[7:0] — Data Direction Register D Bits
Avoid glitches on port D pins by writing to the port D data register before
changing data direction register D bits from 0 to 1.
Figure 19-15
When bit DDRDx is a logic 1, reading address $0003 reads the PTDx
data latch. When bit DDRDx is a logic 0, reading address $0003 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port D pins.
Notes:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect the input.
These read/write bits control port D data direction. Reset clears
DDRD[7:0], configuring all port D pins as inputs.
DDRD
Bit
0
1
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
READ DDRD ($0007)
WRITE DDRD ($0007)
WRITE PTD ($0003)
READ PTD ($0003)
PTD Bit
shows the port D I/O logic.
Input/Output (I/O) Ports
X
X
(1)
Table 19-5. Port D Pin Functions
Figure 19-15. Port D I/O Circuit
RESET
Input, Hi-Z
I/O Pin
Output
Mode
(2)
DDRDx
PTDx
Read/Write
DDRD[7:0]
DDRD[7:0]
Accesses
to DDRD
Table 19-5
MC68HC908LD64
PTD[7:0]
Freescale Semiconductor
Read
Accesses to PTD
Pin
summarizes
PTD[7:0]
PTD[7:0]
Write
Rev. 3.0
PTDx
(3)

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