mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 258

• Manufacturer Part Number: mc68hc908ld64
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Sync Processor
17.5.4 Clamp Pulse Output
Data Sheet
258
When the SOUT bit is set, the HOUT output is a free-running pulse. Both
HOUT and VOUT outputs are negative polarity, with frequencies
selected by the H & V Sync Output Control Register (HVOCR).
When the ELS0B and ELS0A bits in the TSC0 register are logic 0 (see
Table
pulse is triggered either on the leading edge or the trailing edge of
HSYNC, controlled by BPOR bit, with the polarity controlled by the
COINV bit. See
(BPOR = 0)
(BPOR = 1)
(BPOR = 0)
(BPOR = 1)
ATPOL
(HPOL = 1)
(HPOL = 0)
HSYNC
HSYNC
CLAMP
CLAMP
CLAMP
CLAMP
X
0
0
1
1
11-3), a clamp signal is output on the CLAMP pin. This clamp
SOUT
Figure 17-3. Clamp Pulse Output Timing
1
0
0
0
0
Figure 17-3 . Clamp Pulse Output
Sync Processor
Table 17-3. Sync Output Polarity
VINVO
HINVO
or
X
0
1
0
1
Pulse width = 0.33~2.1µs
Pulse width = 0.33~2.1µs
Free-running video mode output
Same polarity as sync input
Inverted polarity of sync input
Negative polarity sync output
Positive polarity sync output
Pulse width = 0.33~2.1µs
Pulse width = 0.33~2.1µs
Sync Outputs:
VOUT/HOUT
MC68HC908LD64
Freescale Semiconductor
Timing.
—
Rev. 3.0