mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 299

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mc68hc908ld64

Manufacturer Part Number
mc68hc908ld64
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
19.3.3 Port A Options
MC68HC908LD64
Freescale Semiconductor
Rev. 3.0
Address:
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic 0, reading address $0000 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port A pins.
The keyboard interrupt enable register (KBIER) selects the port A pins
for keyboard interrupt function or as standard I/O function. (See
21. Keyboard Interrupt Module
KBIE[7:0] — Keyboard Interrupt Enable Bits
Notes:
Reset:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
Read:
Write:
DDRA
Setting a KBIEx bit to logic 1 configures the PTAx/KBIx pin for
keyboard interrupt function. Reset clears the KBIEx bits.
Bit
0
1
Figure 19-5. Keyboard Interrupt Enable Register (KIER)
1 = PTAx/KBIx pin configured as KBIx interrupt pin
0 = PTAx/KBIx pin configured as PTAx standard I/O pin
$004F
KBIE7
Bit 7
PTA Bit
0
X
X
(1)
Input/Output (I/O) Ports
KBIE6
6
0
Table 19-2. Port A Pin Functions
Input, Hi-Z
I/O Pin Mode
Output
KBIE5
5
0
(2)
Accesses to DDRA
KBIE4
(KBI).)
4
0
DDRA[7:0]
DDRA[7:0]
Read/Write
KBIE3
3
0
Table 19-2
KBIE2
PTA[7:0]
2
0
Input/Output (I/O) Ports
Read
Pin
Accesses to PTA
KBIE1
summarizes
1
0
PTA[7:0]
Data Sheet
PTA[7:0]
Section
Write
KBIE0
Bit 0
Port A
0
(3)
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