mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 168

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mc68hc908ld64

Manufacturer Part Number
mc68hc908ld64
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Timer Interface Module (TIM)
11.10.5 TIM Channel Registers (TCH0H/L:TCH1H/L)
Data Sheet
168
NOTE:
TOVx — Toggle-On-Overflow Bit
When TOVx is set, a TIM counter overflow takes precedence over a
channel x output compare if both occur at the same time.
CHxMAX — Channel x Maximum Duty Cycle Bit
These read/write registers contain the captured TIM counter value of the
input capture function or the output compare value of the output
compare function. The state of the TIM channel registers after reset is
unknown.
In input capture mode (MSxB:MSxA = 0:0), reading the high byte of the
TIM channel x registers (TCHxH) inhibits input captures until the low
byte (TCHxL) is read.
CHxMAX
When channel x is an output compare channel, this read/write bit
controls the behavior of the channel x output when the TIM counter
overflows. When channel x is an input capture channel, TOVx has no
effect. Reset clears the TOVx bit.
When the TOVx bit is at logic one, setting the CHxMAX bit forces the
duty cycle of buffered and unbuffered PWM signals to 100%. As
Figure 11-7
is set or cleared. The output stays at the 100% duty cycle level until
the cycle after CHxMAX is cleared.
TCHx
1 = Channel x pin toggles on TIM counter overflow.
0 = Channel x pin does not toggle on TIM counter overflow.
OVERFLOW
Timer Interface Module (TIM)
COMPARE
shows, the CHxMAX bit takes effect in the cycle after it
PERIOD
OUTPUT
Figure 11-7. CHxMAX Latency
OVERFLOW
COMPARE
OUTPUT
OVERFLOW
COMPARE
OUTPUT
MC68HC908LD64
OVERFLOW
Freescale Semiconductor
COMPARE
OUTPUT
OVERFLOW
Rev. 3.0

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