mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 212

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mc68hc908ld64

Manufacturer Part Number
mc68hc908ld64
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Universal Serial Bus Module (USB)
14.7.3 USB Embedded Device Interrupt Register 1 (DIR1)
Data Sheet
212
Address:
RXD0FR — Embedded Device Endpoint 0 Receive Flag Reset
TXD1F — Embedded Device Endpoint 1/2 Data Transmit Flag
TXD1IE — Embedded Device Endpoint 1/2 Transmit Interrupt Enable
Figure 14-15. USB Embedded Device Interrupt Register 1 (DIR1)
Reset:
Read:
Write:
Writing a logic 1 to this write-only bit will clear the RXD0F bit if it is set.
Reset clears this bit.
This read-only bit is shared by endpoint 1 and endpoint 2 of the
embedded device. It is set after the data stored in the shared
endpoint 1/2 transmit buffer of the embedded device have been sent
and an ACK handshake packet received from the host. Once the next
set of data is ready in the transmit buffers, software must clear this
flag by writing a logic 1 to the TXD1FR bit. To enable the next data
packet transmission, TX1E must also be set. If TXD1F bit is not
cleared, a NAK handshake will be returned in the next IN transaction.
TXD1F generates an interrupt request to the CPU if the TXD1IE bit is
also set. Writing to TXD1F has no effect. Reset clears this bit.
This read/write bit enables the TXD1F bit to generate CPU interrupt
request when set. Reset clears the TXD1IE bit.
1 = Write 1 to clear RXD0F bit
0 = No effect
1 = Transmit on endpoint 1 or endpoint 2 of the embedded device
0 = Transmit on endpoint 1 or endpoint 2 of the embedded device
1 = TXD1F CPU interrupt requests enabled
0 = TXD1F CPU interrupt requests disabled
TXD1F
$004A
Bit 7
Universal Serial Bus Module (USB)
has occurred
has not occurred
0
= Unimplemented
6
0
0
5
0
0
4
0
0
TXD1IE
3
0
MC68HC908LD64
Freescale Semiconductor
2
0
0
TXD1FR
1
0
0
Rev. 3.0
Bit 0
0
0

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