mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 330

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mc68hc908ld64

Manufacturer Part Number
mc68hc908ld64
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Computer Operating Properly (COP)
22.3 Functional Description
Data Sheet
330
INTERNAL RESET SOURCES
(COPRS FROM CONFIG)
RESET VECTOR FETCH
(COPD FROM CONFIG)
STOP INSTRUCTION
COPEN (FROM SIM)
NOTE:
COPCTL WRITE
COPCTL WRITE
COP RATE SEL
COP DISABLE
OSCXCLK
RESET
Figure 22-1
The COP counter is a free-running 6-bit counter preceded by a 12-bit
prescaler counter. If not cleared by software, the COP counter overflows
and generates an asynchronous reset after 2
OSCXCLK cycles, depending on the state of the COP rate select bit,
COPRS, in configuration register 1. With a 2
overflow option, a 24MHz crystal gives a COP timeout period of
10.922ms. Writing any value to location $FFFF before an overflow
occurs prevents a COP reset by clearing the COP counter and stages
12 through 5 of the prescaler.
Service the COP immediately after reset and before entering or after
exiting stop mode to guarantee the maximum time before the first COP
counter overflow.
Figure 22-1. COP Block Diagram
Computer Operating Properly (COP)
12-BIT COP PRESCALER
shows the structure of the COP module.
COP CLOCK
COP COUNTER
6-BIT COP COUNTER
CLEAR
18
RESET STATUS REGISTER
18
MC68HC908LD64
– 2
– 2
RESET CIRCUIT
Freescale Semiconductor
4
4
OSCXCLK cycle
or 2
13
– 2
4
Rev. 3.0

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