mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 114

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mc68hc908ld64

Manufacturer Part Number
mc68hc908ld64
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
System Integration Module (SIM)
9.2 Introduction
Data Sheet
114
9.7
9.7.1
9.7.2
9.8
9.8.1
9.8.2
9.8.3
This section describes the system integration module, which supports up
to 16 external and/or internal interrupts. Together with the CPU, the SIM
controls all MCU activities. A block diagram of the SIM is shown in
Figure
SIM is a system state controller that coordinates CPU and exception
timing. The SIM is responsible for:
Bus clock generation and control for CPU and peripherals:
– Stop/wait/reset/break entry and recovery
– Internal clock control
Master reset control, including power-on reset (POR) and COP
timeout
Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
CPU enable/disable timing
Modular architecture expandable to 128 interrupt sources
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
9-1.
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
SIM Break Status Register (SBSR) . . . . . . . . . . . . . . . . . . 134
SIM Reset Status Register (SRSR) . . . . . . . . . . . . . . . . . . 135
SIM Break Flag Control Register (SBFCR) . . . . . . . . . . . . 136
System Integration Module (SIM)
Figure 9-2
shows a summary of the SIM I/O registers. The
MC68HC908LD64
Freescale Semiconductor
Rev. 3.0

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