ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 344

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

Table 226. EMAC FIFO Data Register—Low Byte
Table 227. EMAC FIFO Data Register—High Byte
PS027001-0707
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
[7:0]
EMAC_FDATA_L
Bit
Reset
CPU Access
Note: R = Read Only; R/W = Read/Write.
Bit
Position
[7:2]
[1:0]
EMAC_FDATA_H
EMAC FIFO Data Register—Low and High Bytes
The FIFO Read/Write Test Access Data Register allows writing and reading the FIFO
selected by the EMAC_TEST TxRx_SEL bit when the EMAC_TEST register
TEST_FIFO bit is set. See
Value
00h–FFh These bits represent the Low byte of the 10 bit EMAC
Value
00h
0h–3h
R/W
X
R
7
7
0
Description
Reserved.
These bits represent the upper two bits of the 10 bit EMAC
FIFO data value, {EMAC_FDATA_H[1:0],
EMAC_FDATA_L}. Bit 1 is bit 9 (msb) of the 16 bit value.
Bit 0 is bit 8 of the 10 bit value.
Description
FIFO data value, {EMAC_FDATA_H[1:0],
EMAC_FDATA_L}. Bit 7 is bit 7 of the 16 bit value. Bit 0 is
bit 0 (lsb) of the 10 bit value.
R/W
X
R
6
6
0
R/W
Table 226
X
R
5
5
0
R/W
X
R
4
4
0
and
(EMAC_FDATA_L = 0057h)
(EMAC_FDATA_H = 0058h)
Table
R/W
R
X
3
3
0
227.
R/W
R
X
2
2
0
R/W
R/W
Ethernet Media Access Controller
X
X
1
1
Product Specification
R/W
R/W
X
X
0
0
eZ80F91 ASSP
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