ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 120

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

PS027001-0707
Flash Column Select Register
The Flash Column Select Register is an 8-bit value used to define one of the 256 bytes of
Flash memory contained in a single row. This register is used for all I/O access to Flash
memory. In addition, each access to the FLASH_DATA register causes an autoincrement
of the Flash address stored in the Flash Address registers (FLASH_PAGE, FLASH_ROW,
FLASH_COL). See
Table 45. Flash Column Select Register
Flash Program Control Register
The Flash Program Control Register is used to perform the functions of MASS ERASE,
PAGE ERASE, and ROW PROGRAM. MASS ERASE and PAGE ERASE are
self-clearing functions.
MASS ERASE requires approximately 200 ms to completely erase the full 256 KB of
main Flash and the 512-byte information page if the FLASH_PAGE register(0x00FC)
bit7(INFO_EN) is set. The 200 ms time is not reduced by excluding the 512 byte
information page.
PAGE ERASE requires approximately 10 ms to erase a 2 KB page.
On completion of either a MASS ERASE or PAGE ERASE, the value of each
corresponding bit is reset to 0.
When Flash is being erased, any Read or Write access to Flash forces the CPU into a Wait
state until the Erase operation is complete and the Flash is accessed. Reads and Writes to
areas other than Flash memory proceeds as usual while an Erase operation is
underway.
During row programming, any reads of Flash memory force a WAIT condition until the
row programming operation completes or times out. See
Bit
Reset
CPU Access
Note: R/W = Read/Write, R = Read Only.
Bit
Position
[7:0]
FLASH_COL
Value
00h–FFh Column address of Flash memory to be used during an I/O
Table
R/W
45.
7
0
Description
access of Flash memory.
R/W
6
0
R/W
5
0
(FLASH_COL = 00FEh)
R/W
4
0
Table
R/W
3
0
46.
Product Specification
R/W
2
0
eZ80F91 ASSP
R/W
1
0
Flash Memory
R/W
0
0
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