ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 340

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

Table 220. EMAC Receive Write Pointer Register—Low Byte
PS027001-0707
5
NVALID
[4:0]
RDADR
Bit
Reset
CPU Access
Note: R = Read Only.
Bit
Position
[7:0]
EMAC_RWP_L
EMAC Receive Write Pointer Register—Low Byte
The Read Only Receive-Write-Pointer register reports the current RxDMA Receive Write
pointer. This pointer gets initialized to EmacTLBP whenever Emac_RST bits SRST or
HRRTN are set. Because the size of the packet is limited to a minimum of 32 bytes, the
last five bits are always zero. See
1
0
00h–1Fh Denotes PHY addressed in current scan cycle.
Value
00h–
E0h
MII Scan result is not valid Emac_PRSD is invalid
Emac_PRSD is valid.
R
7
0
Description
These bits represent the Low byte of the 2 byte EMAC
RxDMA Receive Write Pointer value, {EMAC_RWP_H,
EMAC_RWP_L}. Bit 7 is bit 7 of the 16 bit value. Bit 0 is bit 0
(lsb) of the 16 bit value.
R
6
0
R
5
0
Table 220
R
4
0
R
and
3
0
Table 221
R
2
0
(EMAC_RWP_L = 0051h)
on page 333.
Ethernet Media Access Controller
R
1
0
Product Specification
R
0
0
eZ80F91 ASSP
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