ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 28

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

PS027001-0707
Table 2. Pin Identification on the eZ80F91 Device (Continued)
LQFP
Pin No
114
115
116
A10
B10
E8
BGA
Pin No Symbol
PA0
PWM0
OC0
PA1
PWM1
OC1
PA2
PWM2
OC2
Function
GPIO Port A
GPIO Port A
GPIO Port A
PWM
Output 0
Output
Compare 0
PWM
Output 1
Output
Compare 1
PWM
Output 2
Output
Compare 2
Signal Direction Description
Bidirectional
Output
Output
Bidirectional
Output
Output
Bidirectional
Output
Output
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port A
pin, when programmed as output is
selected to be an open-drain or
open-source output.
This pin is used by Timer 3 for PWM
0. This signal is multiplexed with
PA0.
This pin is used by Timer 3 for
Output Compare 0. This signal is
multiplexed with PA0.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port A
pin, when programmed as output is
selected to be an open-drain or
open-source output.
This pin is used by Timer 3 for PWM
1. This signal is multiplexed with
PA1.
This pin is used by Timer 3 for
Output Compare 1. This signal is
multiplexed with PA1.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually
as an interrupt input. Each Port A
pin, when programmed as output is
selected to be an open-drain or
open-source output.
This pin is used by Timer 3 for PWM
2. This signal is multiplexed with
PA2.
This pin is used by Timer 3 for
Output Compare 2. This signal is
multiplexed with PA2.
Product Specification
Architectural Overview
eZ80F91 ASSP
20