ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 313

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

Table 183. EMAC Configuration Register 2
PS027001-0707
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
7
BPNB
6
NOBO
[5:0]
LCOL
EMAC Configuration Register 2
The EMAC Configuration Register 2 controls the behavior of the back pressure and late
collision data from the Descriptor table. See
Value
0
1
0
1
00h–3Fh Sets the number of bytes after Start Frame Delimiter (SFD) for
R/W
Description
Use normal back-off algorithm prior to transmitting packet. No
back pressure applied.
After incidentally causing a collision during back pressure, the
EMAC immediately (that is, no back-off) retransmits the packet
without back-off, which reduces the chance of further collisions
and ensures that the Transmit packets are sent.
Enable exponential back-off.
The EMAC immediately retransmits following a collision rather
than use the binary exponential backfill algorithm, as specified
in the IEEE 802.3 specification.
which a late collision occurs. By default, all late collisions are
aborted.
7
0
R/W
6
0
R/W
5
1
(EMAC_CFG2 = 0022h)
R/W
4
1
R/W
3
0
Table
183.
R/W
2
1
R/W
Ethernet Media Access Controller
1
1
Product Specification
R/W
0
1
eZ80F91 ASSP
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