ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 332

• Manufacturer Part Number: ez80f91
• Description: Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
• Manufacturer: ZiLOG Semiconductor

Table 209. EMAC Boundary Pointer Register—Upper Byte
Table 210. EMAC Receive High Boundary Pointer Register—Low Byte (EMAC_RHBP_L = 0047h)
PS027001-0707
Bit
Reset
CPU Access
Note: R = Read Only.
Bit
Position
[7:0]
EMAC_BP_U
Bit
Reset
CPU Access
Note: R = Read Only, R/W = Read/Write
Bit
Position
[7:0]
EMAC_RHBP_L
EMAC Receive High Boundary Pointer Register—Low and High Bytes
The Receive High Boundary Pointer Register must be set to the end of the Receive buffer
+1 in EMAC shared memory. This RHBP uses the same RAM_ADDR_U as the
EMAC_BP_U pointer above. See
Value
00h–FFh These bits represent the upper byte of the 3 byte EMAC
Value
00h–E0h These bits represent the Low byte of the 2 byte EMAC
R/W
Description
Boundary Pointer value, {EMAC_BP_U, EMAC_BP_H,
EMAC_BP_L}. Bit 7 is bit 23 of the 24 bit value. Bit 0 is bit 16 of
the 24 bit value.
R
7
1
7
0
Description
Receive High Boundary Pointer value, {EMAC_RHBP_H,
EMAC_RHBP_L}. Bit 7 is bit 7 of the 16 bit value. Bit 0 is bit
0 (lsb) of the 16 bit value.
R/W
R
6
1
6
0
R/W
R
5
1
5
0
Table 210
R
R
4
1
4
0
R
R
3
1
3
0
and
Table 211
R
R
(EMAC_BP_U = 0046h)
2
1
2
0
on page 325.
Ethernet Media Access Controller
R
R
1
1
1
0
Product Specification
R
R
0
1
0
0
eZ80F91 ASSP
324