ez80f91 ZiLOG Semiconductor, ez80f91 Datasheet - Page 227
ez80f91
Manufacturer Part Number
ez80f91
Description
Ez80 Acclaimplus!? Connectivity Assp Ez80f91 Assp
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80F91.pdf
(387 pages)
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Table 118. I
PS027001-0707
Code
18h
20h
38h
68h
78h
B0h
Notes
1. W is defined as the Write bit; that is, the lsb is cleared to 0.
2. AAK is an I 2 C control bit that identifies which ACK signal to transmit.
3. R is defined as the Read bit; that is, the lsb is set to 1.
I
Addr+W transmitted
ACK received
Addr+W transmitted,
ACK not received
Arbitration lost
Arbitration lost,
+W received,
ACK transmitted
Arbitration lost,
General call address
received, ACK
transmitted
Arbitration lost,
SLA+R received,
ACK transmitted
2
C State
2
C Master Transmit Status Codes
1
3
ASSP Response
For a 7-bit address: write byte to DATA,
clear IFLG
Or set STA, clear IFLG
Or set STP, clear IFLG
Or set STA & STP, clear IFLG
For a 10-bit address: write extended
address byte to data, clear IFLG
Same as code 18h
Clear IFLG
Or set STA, clear IFLG
Clear IFLG, AAK = 0
Or clear IFLG, AAK = 1
Same as code 68h
Write byte to DATA, clear IFLG, clear AAK
= 0
Or write byte to DATA, clear IFLG, set AAK
= 1
2
Next I
Transmit data byte,
receive ACK
Transmit repeated
START
Transmit STOP
Transmit STOP then
START
Transmit extended
address byte
Same as code 18h
Return to idle
Transmit START when
bus is free
Receive data byte,
transmit NACK
Receive data byte,
transmit ACK
Same as code 68h
Transmit last byte,
receive ACK
Transmit data byte,
receive ACK
Product Specification
I
2
2
C Serial I/O Interface
C Action
eZ80F91 ASSP
219
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