XC2V8000-5BF957C Xilinx, Inc., XC2V8000-5BF957C Datasheet - Page 80

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XC2V8000-5BF957C

Manufacturer Part Number
XC2V8000-5BF957C
Description
Virtex-II 1.5V Field-Programmable Gate Array
Manufacturer
Xilinx, Inc.
Datasheet
Virtex-II 1.5V Field-Programmable Gate Arrays Pinout Information
Table 4: Virtex-II Pin Definitions (Continued)
Module 4 of 4
4
Notes:
1.
PROG_B
DONE
M2, M1, M0
HSWAP_EN
TCK
TDI
TDO
TMS
PWRDWN_B
Other Pins
DXN, DXP
V
RSVD
V
V
V
GND
BATT
CCO
CCAUX
CCINT
All dedicated pins (JTAG and configuration) are powered by V
Pin Name
Input
Input/Output
Input
Input
Input
Input
Output
Input
Input
N/A
Input
N/A
Input
Input
Input
Input
Direction
Active Low asynchronous reset to configuration logic. This pin has a permanent weak
pull-up resistor.
DONE is a bidirectional signal with an optional internal pull-up resistor. As an output,
this pin indicates completion of the configuration process. As an input, a Low level on
DONE can be configured to delay the start-up sequence.
Configuration mode selection.
Enable I/O pullups during configuration.
Boundary Scan Clock.
Boundary Scan Data Input.
Boundary Scan Data Output.
Boundary Scan Mode Select.
Power down pin.
Temperature-sensing diode pins (Anode: DXP, Cathode: DXN).
Decryptor key memory backup supply. (Do not connect if battery is not used.)
Reserved pin - do not connect.
Power-supply pins for the output drivers (per bank).
Power-supply pins for auxiliary circuits.
Power-supply pins for the internal core logic.
Ground.
www.xilinx.com
1-800-255-7778
CCAUX
(independent of the bank V
Description
CCO
Advance Product Specification
voltage).
DS031-4 (v1.5) April 2, 2001
R

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