XC2V8000-5BF957C Xilinx, Inc., XC2V8000-5BF957C Datasheet - Page 55

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XC2V8000-5BF957C

Manufacturer Part Number
XC2V8000-5BF957C
Description
Virtex-II 1.5V Field-Programmable Gate Array
Manufacturer
Xilinx, Inc.
Datasheet
Table 14: IOB Input Switching Characteristics (Continued)
DS031-3 (v1.9) October 12, 2001
Advance Product Specification
Notes:
1.
Propagation Delays
Pad to output IQ via transparent
latch, no delay
Pad to output IQ via transparent
latch, with delay
Clock CLK to output IQ
Setup and Hold Times With Respect to Clock at IOB Input
Register
Pad, no delay
Pad, with delay
ICE input
SR input (IFF, synchronous)
Set/Reset Delays
SR input to IQ (asynchronous)
GSR to output IQ
Input timing for LVTTL is measured at 1.4 V. For other I/O standards, see
Description
R
T
T
T
IOPICKD
IOICECK
IOPICK
Symbol
T
T
T
T
T
T
IOSRCKI
IOCKIQ
IOSRIQ
IOPLID
GSRQ
IOPLI
/T
/T
/T
IOICKP
IOICKPD
IOCKICE
www.xilinx.com
1-800-255-7778
Device
2v1000
2v1500
2v2000
2v3000
2v4000
2v6000
2v8000
2v1000
2v1500
2v2000
2v3000
2v4000
2v6000
2v8000
2v250
2v500
2v250
2v500
2v40
2v80
2v40
2v80
All
All
All
All
All
All
All
Table
Virtex-II 1.5V Field-Programmable Gate Arrays
0.9/– 0.36
0.19/0.03
3.4/– 2.0
3.4/– 2.0
3.4/– 2.0
3.4/– 2.0
3.4/– 2.0
3.4/– 2.0
3.4/– 2.0
3.5/– 2.1
3.5/– 2.1
3.7/– 2.3
TBD
TBD
0.27
18.
1.0
3.5
3.5
3.5
3.5
3.5
3.5
3.5
3.6
3.6
3.8
0.7
1.2
7.3
– 6
Speed Grade
1.0/– 0.39
0.21/0.04
3.7/– 2.2
3.7/– 2.2
3.7/– 2.2
3.7/– 2.2
3.7/– 2.2
3.7/– 2.2
3.7/– 2.2
3.8/– 2.3
3.8/– 2.3
4.1/– 2.5
4.1/– 2.5
0.30
1.1
3.8
3.8
3.8
3.8
3.8
3.8
3.8
3.9
3.9
4.2
4.2
0.7
1.3
8.0
– 5
1.2/– 0.45
0.24/0.04
4.3/– 2.6
4.3/– 2.6
4.3/– 2.6
4.3/– 2.6
4.3/– 2.6
4.3/– 2.6
4.3/– 2.6
4.4/– 2.7
4.4/– 2.7
4.7/– 2.9
4.7/– 2.9
0.34
1.3
4.4
4.4
4.4
4.4
4.4
4.4
4.4
4.5
4.5
4.9
4.9
0.8
1.4
9.2
– 4
Module 3 of 4
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
Units
9

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