XC2V8000-5BF957C Xilinx, Inc., XC2V8000-5BF957C Datasheet - Page 32
XC2V8000-5BF957C
Manufacturer Part Number
XC2V8000-5BF957C
Description
Virtex-II 1.5V Field-Programmable Gate Array
Manufacturer
Xilinx, Inc.
Datasheet
1.XC2V8000-5BF957C.pdf
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Control Pins and Attributes
Virtex-II SelectRAM memory has two independent ports
with the control signals described in
inputs including the clock have an optional inversion.
Table 17: Control Functions
Initial memory content is determined by the INIT_xx
attributes. Separate attributes determine the output register
value after device configuration (INIT) and SSR is asserted
(SRVAL). Both attributes (INIT_B and SRVAL) are available
for each port when a block SelectRAM resource is config-
ured as dual-port RAM.
Locations
Virtex-II SelectRAM memory blocks are located in either
four or six columns. The number of blocks per column
depends of the device array size and is equivalent to the
DS031-2 (v1.8) October 12, 2001
Advance Product Specification
Control Signal
SSR
CLK
WE
EN
R
SelectRAM Blocks
Enable affects Read, Write, Set, Reset
Set DO register to SRVAL (attribute)
Figure 33: Block SelectRAM (2-column, 4-column, and 6-column)
Read and Write Clock
Write Enable
Function
Table
17. All control
SelectRAM Blocks
www.xilinx.com
1-800-255-7778
number of CLBs in a column divided by four. Column loca-
tions are shown in
Table 18: SelectRAM Memory Floor Plan
XC2V1000
XC2V1500
XC2V2000
XC2V3000
XC2V4000
XC2V6000
XC2V8000
XC2V250
XC2V500
XC2V40
XC2V80
Device
SelectRAM Blocks
Virtex-II 1.5V Field-Programmable Gate Arrays
Columns
Table
2
2
4
4
4
4
4
6
6
6
6
18.
Per Column
SelectRAM Blocks
ds031_38_101000
10
12
14
16
20
24
28
2
4
6
8
Module 2 of 4
Total
120
144
168
24
32
40
48
56
96
4
8
25
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