XC2V8000-5BF957C Xilinx, Inc., XC2V8000-5BF957C Datasheet - Page 15
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XC2V8000-5BF957C
Manufacturer Part Number
XC2V8000-5BF957C
Description
Virtex-II 1.5V Field-Programmable Gate Array
Manufacturer
Xilinx, Inc.
Datasheet
1.XC2V8000-5BF957C.pdf
(301 pages)
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Virtex-II 1.5V Field-Programmable Gate Arrays
Table 6: Compatible Input Standards
Module 2 of 4
8
Notes:
1.
2.
1.0V
0.9V
0.8V
0.75V
Inputs that are V
also be placed in banks with inputs and outputs of different voltages that are V
All non-DCI differential inputs are V
V
V
CCO
REF
REF
LVTTL, LVDCI_33,
LVDCI_DV2_33,
LVCMOS33,
PCI33_3, PCI66_3,
PCI-X, LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
GTLP
LVTTL, LVDCI_33,
LVDCI_DV2_33,
LVCMOS33,
PCI33_3, PCI66_3,
PCI-X, LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
HSTL_III, HSTL_IV
LVTTL, LVDCI_33,
LVDCI_DV2_33,
LVCMOS33,
PCI33_3, PCI66_3,
PCI-X, LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
GTL
LVTTL, LVDCI_33,
LVDCI_DV2_33,
LVCMOS33,
PCI33_3, PCI66_3,
PCI-X, LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
HSTL_I, HSTL_II
controlled are completely independent of those that are V
3.3V
CCAUX
LVCMOS25,
LVDCI_25,
LVDCI_DV2_25,
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
GTLP
LVCMOS25,
LVDCI_25,
LVDCI_DV2_25,
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
HSTL_III, HSTL_IV
LVCMOS25,
LVDCI_25,
LVDCI_DV2_25,
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
GTL
LVCMOS25,
LVDCI_25,
LVDCI_DV2_25,
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
HSTL_I, HSTL_II
controlled. This makes them (Inputs Only) very flexible in terms of banking rules.
2.5V
www.xilinx.com
1-800-255-7778
LVCMOS18,
LVDCI_18,
LVDCI_DV2_18,
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
GTLP
LVCMOS18,
LVDCI_18,
LVDCI_DV2_18,
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
HSTL_III, HSTL_IV
LVCMOS18,
LVDCI_18,
LVDCI_DV2_18,
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
GTL
LVCMOS18,
LVDCI_18,
LVDCI_DV2_18,
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
HSTL_I, HSTL_II
1.8V
CCO
CCO
controlled. Therefore, V
controlled.
LVCMOS15,
LVDCI_15,
LVDCI_DV2_15,
GTLP_DCI,
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
GTLP
LVCMOS15,
LVDCI_15,
LVDCI_DV2_15,
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25,
HSTL_III_DCI,
HSTL_IV_DCI
HSTL_III, HSTL_IV
LVCMOS15,
LVDCI_15,
LVDCI_DV2_15,
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
GTL
LVCMOS15,
LVDCI_15,
LVDCI_DV2_15,
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25,
HSTL_I_DCI,
HSTL_II_DCI
HSTL_I, HSTL_II
1.5V
DS031-2 (v1.8) October 12, 2001
Advance Product Specification
REF
controlled inputs can
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
GTLP
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
HSTL_III, HSTL_IV
GTL_DCI,
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
GTL
LVDS_33,
LVDSEXT_33,
LVPECL_33,
LVDS_25,
LVDSEXT_25, LDT,
BLVDS, ULVDS_25
HSTL_I, HSTL_II
1.2V
R
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