XC2V8000-5BF957C Xilinx, Inc., XC2V8000-5BF957C Datasheet - Page 65

• Manufacturer Part Number: XC2V8000-5BF957C
• Description: Virtex-II 1.5V Field-Programmable Gate Array
• Manufacturer: Xilinx, Inc.

CLB Distributed RAM Switching Characteristics
Table 22: CLB Distributed RAM Switching Characteristics
CLB Shift Register Switching Characteristics
Table 23: CLB Shift Register Switching Characteristics
DS031-3 (v1.9) October 12, 2001
Advance Product Specification
Sequential Delays
Clock CLK to X/Y outputs (WE active) in 16 x 1 mode
Clock CLK to X/Y outputs (WE active) in 32 x 1 mode
Clock CLK to F5 output
Setup and Hold Times Before/After Clock CLK
BX/BY data inputs (DIN)
F/G address inputs
CE input (WE)
Clock CLK
Minimum Pulse Width, High
Minimum Pulse Width, Low
Minimum clock period to meet address write cycle time
Sequential Delays
Clock CLK to X/Y outputs
Clock CLK to X/Y outputs
Clock CLK to XB output via MC15 LUT output
Clock CLK to YB output via MC15 LUT output
Clock CLK to Shiftout
Clock CLK to F5 output
Setup and Hold Times Before/After Clock CLK
BX/BY data inputs (DIN)
CE input (WS)
Clock CLK
Minimum Pulse Width, High
Minimum Pulse Width, Low
R
Description
Description
T
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SRLDS
T
WSS
Symbol
T
T
T
T
T
T
T
T
T
REGXB
REGYB
REGF5
T
T
T
REG32
WES
CKSH
SRPH
T
SRPL
Symbol
T
REG
SHCKOF5
SHCKO16
SHCKO32
DS
/T
/T
AS
T
T
T
WPH
WPL
SRLDH
WSH
WC
/T
/T
/T
AH
DH
WEH
Virtex-II 1.5V Field-Programmable Gate Arrays
0.30/– 0.07
0.19/– 0.06
0.53/– 0.09
0.42/– 0.01
0.40/0.0
2.4
2.7
2.3
2.2
2.0
2.5
0.6
0.6
1.7
2.0
1.8
0.6
0.6
1.2
–
–
6
6
Speed Grade
Speed Grade
0.46/– 0.01
0.33/– 0.08
0.21/– 0.07
0.6/– 0.10
0.44/0.0
1.8
2.2
2.0
0.7
0.7
1.3
–
2.6
3.0
2.5
2.4
2.2
2.7
0.7
0.7
–
5
5
0.53/– 0.01
0.37/– 0.09
0.24/– 0.08
0.7/– 0.11
0.50/0.0
2.1
2.5
2.3
0.8
0.8
1.5
3.0
3.4
2.9
2.8
2.5
3.1
0.8
0.8
–
–
4
4
Module 3 of 4
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, max
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
Units
Units
19