XC2V8000-5BF957C Xilinx, Inc., XC2V8000-5BF957C Datasheet - Page 16

• Manufacturer Part Number: XC2V8000-5BF957C
• Description: Virtex-II 1.5V Field-Programmable Gate Array
• Manufacturer: Xilinx, Inc.

Digitally Controlled Impedance (DCI)
Today’s chip output signals with fast edge rates require ter-
mination to prevent reflections and maintain signal integrity.
High pin count packages (especially ball grid arrays) can
not accommodate external termination resistors.
Virtex-II DCI provides controlled impedance drivers and
on-chip termination for single-ended I/Os. This eliminates
the need for external resistors, and improves signal integrity.
The DCI feature can be used on any IOB by selecting one of
the DCI I/O standards.
When applied to inputs, DCI provides input parallel termina-
tion. When applied to outputs, DCI provides controlled
impedance drivers (series termination) or output parallel
termination.
DCI operates independently on each I/O bank. When a DCI
I/O standard is used in a particular I/O bank, external refer-
ence resistors must be connected to two dual-function pins
on the bank. These resistors, voltage reference of N transis-
tor (VRN) and the voltage reference of P transistor (VRP)
are shown in
When used with a terminated I/O standard, the value of
resistors are specified by the standard (typically 50
When used with a controlled impedance driver, the resistors
set the output impedance of the driver within the specified
range (25
tions listed in
must have the same value for any given bank. One percent
resistors are recommended.
The DCI system adjusts the I/O impedance to match the two
external reference resistors, or half of the reference resis-
tors, and compensates for impedance changes due to volt-
age and/or temperature fluctuations. The adjustment is
done by turning parallel transistors in the IOB on or off.
DS031-2 (v1.8) October 12, 2001
Advance Product Specification
W
R
Figure 9: DCI in a Virtex-II Bank
to 100
Figure
Table 7
1 Bank
DCI
DCI
DCI
DCI
W)
9.
. For all series and parallel termina-
and
VRN
VRP
Table
V CCO
8, the reference resistors
GND
DS031_50_101200
R
R
REF
REF
(1%)
(1%)
www.xilinx.com
1-800-255-7778
W
).
Controlled Impedance Drivers (Series
Termination)
DCI can be used to provide a buffer with a controlled output
impedance. It is desirable for this output impedance to
match the transmission line impedance (Z). Virtex-II input
buffers also support LVDCI and LVDCI_DV2 I/O standards.
Table 7: SelectI/O Controlled Impedance Buffers
Controlled Impedance Drivers (Parallel
Termination)
DCI also provides on-chip termination for SSTL3, SSTL2,
HSTL (Class I, II, III, or IV), and GTL/GTLP receivers or
transmitters on bidirectional lines.
Table 8
tex-II devices. V
that there is a V
GTLP_DCI, due to the on-chip termination resistor.
Table 8: SelectI/O Buffers With On-Chip Parallel
Termination
Notes:
1.
SSTL3 Class II
SSTL2 Class II
HSTL Class IV
SSTL3 Class I
SSTL2 Class I
HSTL Class III
HSTL Class II
I/O Standard
HSTL Class I
Virtex-II DCI
SSTL Compatible
V
3.3 V
2.5 V
1.8 V
1.5 V
Z
CCO
lists the on-chip parallel terminations available in Vir-
GTLP
GTL
Figure 10: Internal Series Termination
Virtex-II 1.5V Field-Programmable Gate Arrays
IOB
V
CCO
CCO
LVDCI_33
LVDCI_25
LVDCI_18
LVDCI_15
CCO
= 3.3 V, 2.5 V, 1.8 V or 1.5 V
must be set according to
DCI
Termination
SSTL3_II
SSTL2_II
HSTL_IV
External
HSTL_III
SSTL3_I
SSTL2_I
HSTL_II
requirement for GTL_DCI and
HSTL_I
GTLP
GTL
Z
DCI Half Impedance
LVDCI_DV2_33
LVDCI_DV2_25
LVDCI_DV2_18
LVDCI_DV2_15
SSTL3_II_DCI
SSTL2_II_DCI
SSTL3_I_DCI
SSTL2_I_DCI
HSTL_III_DCI
HSTL_IV_DCI
HSTL_II_DCI
Termination
HSTL_I_DCI
GTLP_DCI
GTL_DCI
On-Chip
DS031_51_110600
Table
Module 2 of 4
3. Note
(1)
(1)
(1)
(1)
9