XC2V8000-5BF957C Xilinx, Inc., XC2V8000-5BF957C Datasheet - Page 74

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XC2V8000-5BF957C

Manufacturer Part Number
XC2V8000-5BF957C
Description
Virtex-II 1.5V Field-Programmable Gate Array
Manufacturer
Xilinx, Inc.
Datasheet
Virtex-II 1.5V Field-Programmable Gate Arrays
Output Clock Jitter
Table 34: Output Clock Jitter
Output Clock Phase Alignment
Table 35: Output Clock Phase Alignment
Module 3 of 4
28
Clock Synthesis Period Jitter
CLK0
CLK90
CLK180
CLK270
CLK2X, CLK2X180
CLKDV (integer division)
CLKDV (non-integer division)
CLKFX, CLKFX180
Phase Offset Between CLKIN and CLKFB
CLKIN/CLKFB
Phase Offset Between Any
All CLK* outputs
Duty Cycle Precision
DLL outputs
CLKFX outputs
Description
Description
1
CLKIN_CLKFB_PHASE
CLKOUT_PHASE
CLKOUT_DUTY_CYCLE_DLL
CLKOUT_DUTY_CYCLE_FX
DCM
CLKOUT_PER_JITT_0
CLKOUT_PER_JITT_90
CLKOUT_PER_JITT_180
CLKOUT_PER_JITT_270
CLKOUT_PER_JITT_2X
CLKOUT_PER_JITT_DV1
CLKOUT_PER_JITT_DV2
CLKOUT_PER_JITT_FX
Outputs
Symbol
Symbol
www.xilinx.com
1-800-255-7778
Constraints
Constraints
Min
Min
– 6
– 6
±100
±140
±150
±100
Max
±100
±150
±150
±150
±200
±150
±300
TBD
Max
Speed Grade
Speed Grade
Min
Min
– 5
– 5
DS031-3 (v1.9) October 12, 2001
Advance Product Specification
±100
±140
±150
±100
Max
±100
±150
±150
±150
±200
±150
±300
TBD
Max
Min
Min
– 4
– 4
±100
±150
±150
±150
±200
±150
±300
±100
±140
±150
±100
TBD
Max
Max
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
Units
Units
R

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