XC2V8000-5BF957C Xilinx, Inc., XC2V8000-5BF957C Datasheet - Page 68

• Manufacturer Part Number: XC2V8000-5BF957C
• Description: Virtex-II 1.5V Field-Programmable Gate Array
• Manufacturer: Xilinx, Inc.

Virtex-II 1.5V Field-Programmable Gate Arrays
Virtex-II Pin-to-Pin Output Parameter Guidelines
All devices are 100% functionally tested. Listed below are representative values for typical pin locations and normal clock
loading. Values are expressed in nanoseconds unless otherwise noted.
Global Clock Input to Output Delay for LVTTL, 12 mA, Fast Slew Rate, With DCM
Table 28: Global Clock Input to Output Delay for LVTTL, 12 mA, Fast Slew Rate, With DCM
Module 3 of 4
22
Notes:
1.
2.
3.
LVTTL Global Clock Input to Output Delay
using Output Flip-flop, 12 mA, Fast Slew
Rate, with DCM.
For data output with different standards,
adjust the delays with the values shown in
IOB Output Switching Characteristics
Standard Adjustments, page
Global Clock and OFF with DCM
Listed above are representative values where one global clock input drives one vertical clock line in each accessible column, and
where all accessible IOB and CLB flip-flops are clocked by the global clock net.
Output timing is measured at 50% V
Table
DCM output jitter is already included in the timing calculation.
18.
Description
13.
CC
threshold with 35 pF external capacitive load. For other I/O standards and different loads, see
T
Symbol
ICKOFDCM
www.xilinx.com
1-800-255-7778
Device
2v1000
2v1500
2v2000
2v3000
2v4000
2v6000
2v8000
2v250
2v500
2v40
2v80
TBD
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.3
2.3
2.8
–
6
Speed Grade
DS031-3 (v1.9) October 12, 2001
Advance Product Specification
2.4
2.4
2.4
2.4
2.4
2.4
2.4
2.5
2.5
3.0
3.0
–
5
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.9
2.9
3.5
3.5
–
4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R