ADSP-TS101S Analog Devices, ADSP-TS101S Datasheet - Page 43

• Manufacturer Part Number: ADSP-TS101S
• Description: Embedded Processor
• Manufacturer: Analog Devices

1
2
3
4
5
6
7
REV. A
Part Number
ADSP-TS101SAB1-000
ADSP-TS101SAB2-000
ADSP-TS101SAB1-100
ADSP-TS101SAB2-100
S indicates 1.2 V and 3.3 V supplies.
A indicates –40°C to +85°C temperature.
B1 = B-625, Plastic Ball Grid Array (PBGA); B2 = B-484, Plastic Ball Grid Array (PBGA).
000 indicates 250 MHz speed grade; 100 indicates 300 MHz speed grade.
The instruction rate runs at the internal DSP clock (CCLK) rate.
The B-625 package measures 27 mm
The B-484 package measures 19 mm
NOTES:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
2. THE ACTUAL POSITION OF THE BALL GRID IS WITHIN 0.25mm OF ITS
3. THE ACTUAL POSITION OF EACH BALL IS WITHIN 0.10mm OF ITS
4. CENTER DIMENSIONS ARE NOMINAL.
5. THIS PACKAGE COMPLIES WITH THE JEDEC MS-034 SPECIFICATION,
2.50 MAX
IDEAL POSITION RELATIVE TO THE PACKAGE EDGES.
IDEAL POSITION RELATIVE TO THE BALL GRID.
BUT USES TIGHTER TOLERANCES THAN THE MAXIMUMS ALLOWED IN
THAT SPECIFICATION.
24.20
24.00
23.80
1, 2, 3, 4
27 mm.
19 mm.
TOP VIEW
27.20
27.00
26.80
24.20
24.00
23.80
Temperature
Range (Case)
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
625-Ball PBGA (B-625)
ORDERING GUIDE
27.20
27.00
26.80
DETAIL A
Core Clock
(CCLK) Rate
250 MHz
250 MHz
300 MHz
300 MHz
–43–
24.00
BSC
SQ
SEATING PLANE
1.50
BSC
SQ
PITCH
BALL
BSC
BSC
1.50
1.00
SQ
SQ
5
BALL DIAMETER
0.65
0.55
0.45
25
On-chip
SRAM
6M Bit
6M Bit
6M Bit
6M Bit
24 22
23
21 19
20
18
17
BOTTOM VIEW
16
DETAIL A
15
14
27.20
27.00 SQ
26.80
Operating
Voltage (V)
1.2 V
3.3 V
1.2 V
3.3 V
1.2 V
3.3 V
1.2 V
3.3 V
13
12
11
10
0.70
0.60
0.50
ADSP-TS101S
DD
DD_IO
DD
DD_IO
DD
DD_IO
DD
DD_IO
9
8
7
6
5
4
1.25 MAX
0.40 MIN
0.20 MAX
3
2
1
Package
(B-625)
(B-484)
(B-625)
(B-484)
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
6
7
6
7