ADSP-TS101S Analog Devices, ADSP-TS101S Datasheet - Page 19

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ADSP-TS101S

Manufacturer Part Number
ADSP-TS101S
Description
Embedded Processor
Manufacturer
Analog Devices
Datasheet

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SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS
1
2
ELECTRICAL CHARACTERISTICS
1
2
3
4
5
6
7
8
9
10
11
REV. A
Parameter
V
V
V
T
V
V
I
I
I
I
V
Specifications subject to change without notice.
Applies to input and bidirectional pins.
For details on internal and external power estimation, including: power vector definitions, current usage descriptions, and formulas, see EE-169, Estimating
Parameter
V
V
I
I
I
I
I
I
I
I
I
C
Specifications subject to change without notice.
Applies to output and bidirectional pins.
Applies to input pins with internal pull-downs (pd).
Applies to input pins without internal pull-ups (pu).
Applies to input pins with internal pull-ups (pu).
Applies to three-stateable pins without internal pull-downs (pd).
Applies to open drain (od) pins with 500
Applies to three-stateable pins with internal pull-downs (pd).
Applies to three-stateable pins without internal pull-ups (pu).
Applies to three-stateable pins with internal pull-ups (pu).
Applies to all signals.
Guaranteed but not tested.
Power for the ADSP-TS101S on the Analog Devices website—use site search on “EE-169” (www.analog.com). This document is updated regularly to keep
pace with silicon revisions.
DD
DD
DDIDLELP
DD_IO
IH
IHP
IL
ILP
OZH
OZHP
OZL
OZLP
OZLO
DD
DD_A
DD_IO
IH
IL
REF
OH
OL
CASE
IN
High Level Output Voltage
Low Level Output Voltage
High Level Input Current
High Level Input Current (pd)
Low Level Input Current
Low Level Input Current (pu)
Three-State Leakage Current High
Three-State Leakage Current High (pd)
Three-State Leakage Current Low
Three-State Leakage Current Low (pu)
Three-State Leakage Current Low (od)
Input Capacitance
Internal Supply Voltage
Analog Supply Voltage
I/O Supply Voltage
Case Operating Temperature
High Level Input Voltage
Low Level Input Voltage
V
Activity
V
Activity
V
Instruction Execution
V
Typical Activity
Voltage Reference
DD
DD
DD
DD_IO
Supply Current for IDLELP
Supply Current for Typical
Supply Current for Typical
Supply Current for
2
2
2
10, 11
3
1
2
pull-ups (pu).
1
1
1
4
2
Test Conditions
@ V
@ V
@ CCLK = 250 MHz,
V
@ CCLK = 300 MHz,
V
@ CCLK = 300 MHz,
V
@ SCLK = 100 MHz,
V
8
5, 6
DD
DD
DD
DD_IO
DD
DD
= 1.25 V, T
= 1.25 V, T
= 1.20 V, T
7
9
7
, V
, V
= 3.3 V, T
Test Conditions
@V
@V
@V
@V
@V
@V
@V
@V
@V
@V
@f
V
DD_IO
DD_IO
@V
IN
IN
= 2.5 V
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
= 1 MHz, T
= max
= min
–19–
CASE
CASE
CASE
CASE
= min, I
= min, I
= max, V
= max, V
= max, V
= max, V
= max, V
= max, V
= max, V
= max, V
= max, V
= 25ºC
= 25ºC
= 25ºC
= 25ºC
OH
OL
CASE
IN
IN
IN
IN
IN
IN
IN
IN
IN
= 4 mA
= –2 mA
= V
= V
= 0 V
= 0 V
= V
= V
= 0 V
= 0 V
= 0 V
= 25ºC,
Min
1.14
1.14
3.15
–40
2
–0.5
1.4
DD_IO
DD_IO
DD_IO
DD_IO
max
max
max
max
Typ
1.2
1.5
173
137
Min
2.4
17.2
–69
17.2
–69
–9.8
ADSP-TS101S
Max
1.26
1.26
3.45
+85
V
+0.8
1.6
DD_IO
Max
0.4
10
44.5
10
–23
10
44.5
10
–23
–4.6
5
+ 0.5 V
Unit
V
V
µA
µA
µA
µA
µA
µA
µA
µA
mA
pF
Unit
V
V
V
ºC
V
A
A
mA
mA
V

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