L64724 LSI Logic Corporation, L64724 Datasheet - Page 81

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

3.6.16 Output Control (Group 4: APR 17)
SST[1:0]
This register is used to configure the Channel output data path.
Read/Write: R/W
Reserved
OF
Group 4: Configuration Registers
APR
17
D7
Reserved
information, see
leaver Synchronization,” page 6-8.
Synchronization Status, Tracking Mode
The second synchronization module (after the Viterbi
decoder and before the Deinterleaver module) allows two,
three, four, or five misdetected synchronization words
before the L64724 declares a loss of synchronization. For
more information, see
Deinterleaver Synchronization.”
Reserved
The Reserved bits must be cleared to 0 for proper
operation.
Descrambler Output Format
Writing to the OF bit sets the descrambler output mode
as shown in the following table.
D6
0
0
1
1
0
0
1
1
SST[1:0]
SSA[1:0]
OF
D5
0
1
0
1
0
1
0
1
Section 6.3, “Reed-Solomon Deinter-
Number of Sync Words Found to
D4
Number of Missed Sync Words
Section 6.3, “Reed-Solomon
Until Loss of Lock
Acquire
Reserved
3
4
5
6
2
3
4
5
D0
[1:0]
[7:6]
3-51
5