L64724 LSI Logic Corporation, L64724 Datasheet - Page 127

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

4.3.1 ADC, Demodulator, and FEC Active
4.3.2 ADC Bypassed with Demodulator and FEC Active
Figure 4.5
QBYPASS[5:0)
IBYPASS[5:0]
PCLK
CLK and Digital Inputs for ADC Bypass Mode
Table 4.3
You can supply data to the ADC modules and the subsequent
demodulator and FEC sections by clearing the ADC_BP bit to 0.
Figure 4.4
as well as the input signal CLK used in this input configuration.
Figure 4.4
IVIN, QVIN
Setting the ADC_BP bit to 1 bypasses the ADC and supplies data
directly to the demodulator section.
input signals IBYPASS[5:0] and QBYPASS[5:0] as well as the PLL-
generated signal PCLK used in this input configuration.
Data Path Input Interface
(APR 55, bit 7)
CLK
ADC_BP
0
1
shows the channel analog data input signals IVIN and QVIN
Input Configuration
CLK and Analog Inputs for Channel Data Input
Input Mode Chosen
ADC, Demod and FEC sections active
Demod and FEC sections active, ADC bypassed
Figure 4.5
shows the channel digital
Time
4-13