L64724 LSI Logic Corporation, L64724 Datasheet - Page 111

• Manufacturer Part Number: L64724
• Description: Satellite Receiver
• Manufacturer: LSI Logic Corporation

3.8 Group 6: Reserved (Internal Use Only)
3.9 Group 7: Arbiter Control Register
1. Serial Mode is the recommended interface mode. LSI Logic does not recommend parallel
mode for new designs.
Micro_Enable
Group 7 contains the memory space for internal control of the
microcontroller/microprocessor arbitration module. APR 0 contains the
Microcontroller Disable mechanism.
Read/Write: R
Microcontroller Disable
Group 6: Reserved (Internal Use Only)
APR
0
D7
Demodulator Micro Control Enable
When the Micro_Enable bit is 1, the L64724 internal
microcontroller for the demodulator section starts
operation. In this mode, the demodulator acquires
synchronization for carrier and symbol timing without the
intervention of the external microprocessor. When the bit
is 0, the microcontrol unit in the demodulator is disabled
and the acquisition operation must be performed through
the serial or parallel microprocessor interface
A write operation to Group 7 disables the on-chip
microcontroller when it is running. A Group 7 write can
be used if the microcontroller/host microprocessor
arbitration register is disabled, which means that host
Micro_ Enable
0
1
Microcontroller Disable
Definition
Microcontroller disabled. Acquisition
through Microprocessor Interface.
Microcontroller enabled. Automatic
internal demodulator acquisition.
Reset Value: 0x00
1
.
D0
[7:0]
3-81
0