S1K50000 Epson Electronics America, Inc., S1K50000 Datasheet - Page 96

• Manufacturer Part Number: S1K50000
• Description: Design Guide S1k50000 Series
• Manufacturer: Epson Electronics America, Inc.

8.3 Precautions on Pin Arrangement
8.3.1 Fixed Power-Supply Pins
8.3.2 Precautions on Pin Arrangement
STANDARD CELL S1K50000 SERIES
DESIGN GUIDE
When it is decided which package to use, determine the pin arrangement on the package. For
the power-supply pins and the number of usable input/output pins on each package of the
S1K50000 series, refer to the designated “Pin Arrangement Table.”
When the pin arrangement is decided, send a “Pin Arrangement Table” to Seiko Epson after
specifying the pin arrangement on the designated sheets. At Seiko Epson, placement &
routing is performed based on the presented “Pin Arrangement Table,” so be sure to confirm
that there are no errors or omissions in the table before sending it.
To obtain the designated form for the “Pin Arrangement Table,” contact Seiko Epson or its
distributor.
The pin arrangement is one important specification that determines the quality of LSI. It is
particularly important in terms of preventing noise-induced malfunction. This is even more
important when the difficulty of identifying such noise through simulation or the like is taken
into consideration.
To prevent malfunctions in customers’ LSIs due to unknown causes, we recommend carefully
reading the contents hereof before creating a pin arrangement table.
Depending on the combination of cell types and the package in this series, some pins can only
be used for the power supply. In addition, some pins must be fixed to V
be fixed to V
the “Pin Arrangement Table.”
The pin arrangement affects the LSI’s logic functions and electrical characteristics.
Furthermore, the pin arrangement is subject to limitations for reasons involving LSI assembly,
the cell, or the bulk structure. Therefore, the following explains the factors requiring caution in
the examination of pin arrangement. These factors include the power-supply current,
separation of input and output pins, critical signals, simultaneous input/output changes in pull-
up/down resistors, and large-current drivers.
SS.
When selecting a package, confirm this method of pin fixation by referring to
EPSON
Chapter 8: Pin Arrangement and Simultaneous Operation
DD
, while others must
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