S1K50000 Epson Electronics America, Inc., S1K50000 Datasheet - Page 33

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S1K50000

Manufacturer Part Number
S1K50000
Description
Design Guide S1k50000 Series
Manufacturer
Epson Electronics America, Inc.
Datasheet
Chapter 2: Precautions on Circuit Design
28
• External pin information
Enter the names of pins that match those in the pin arrangement table. The necessary pins
vary with the circuit configuration. (Always be sure to specify the necessary pins.)
• Clock input pins
• Scan enable input pin (Note 3) .................................................. Included • Not included
• ATPG test input pin .................................................................... Included • Not included
• Clear/preset input pin................................................................. Included • Not included
• Other ATPG mode control pins .................................................. Included • Not included
Pin name:______________ Active edge:
Pin name:______________ Active edge:
Pin name:______________ Active edge:
Pin name:______________ Active edge:
Pin name:______________ Active edge:
Pin name:______________ Active level: High • Low
Pin name:______________ Active level: High • Low
Pin name:______________ Active level: High • Low
a. Pin name: ______________
b. Pin name: ______________
c. Pin name: ______________
d. Pin name: ______________
Content of control, active level, etc.
Content of control, active level, etc.
Content of control, active level, etc.
Content of control, active level, etc.
: _____________________________________________________
: _____________________________________________________
: _____________________________________________________
: _____________________________________________________
EPSON
rise • fall
rise • fall
rise • fall
rise • fall
rise • fall
STANDARD CELL S1K50000 SERIES
DESIGN GUIDE

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