S1K50000 Epson Electronics America, Inc., S1K50000 Datasheet - Page 88

• Manufacturer Part Number: S1K50000
• Description: Design Guide S1k50000 Series
• Manufacturer: Epson Electronics America, Inc.

Chapter 7 Estimating Power Consumption
7.1 Calculating Power Consumption
STANDARD CELL S1K50000 SERIES
DESIGN GUIDE
In CMOS LSIs, virtually no current flows through the chip while it is idle. During operation,
however, they consume a certain amount of power in proportion to the operating frequency.
As the power consumption increases, so does the temperature of the LSI chip. An excessively
high chip temperature adversely affects the LSI quality, making it necessary to calculate the
chip’s power consumption in order to determine whether the power consumption falls within its
rated power dissipation.
Power consumption in CMOS circuits generally depends on the circuit’s operating frequency,
load capacitance, and power-supply voltage (this does not include special circuits such as
RAM and ROM through which a steady current is flowing). Consequently, the power
consumption in CMOS gate arrays can be calculated easily only if the operating frequency and
load capacitance of each cell used in the circuit are known. Because the load capacitance of
internal cells is difficult to calculate for each cell, the approximate calculation described below
may be used.
When making this calculation, determine the power consumption in each of the input and
output buffers and internal cells. The sum total of the foregoing is the chip’s total power
consumption.
Therefore, the total power consumption to be calculated, P
shown below.
To calculate the power consumption in a dual-power-supply system, see Chapter 9,
“Precautions on the Use of Dual Power Supplies.”
P
Total
= P
i
+ P
o
+ P
int
P
P
P
o
i
int
EPSON
: power consumption in the input buffer
: power consumption in the output buffer
: power consumption in the internal cell
Chapter 7: Estimating Power Consumption
Total
, is expressed by the equation
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