S1K50000 Epson Electronics America, Inc., S1K50000 Datasheet - Page 74
S1K50000
Manufacturer Part Number
S1K50000
Description
Design Guide S1k50000 Series
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1K50000.pdf
(131 pages)
- Current page: 74 of 131
- Download datasheet (2Mb)
STANDARD CELL S1K50000 SERIES
DESIGN GUIDE
Here, calculation is performed assuming that Load B for NODE P is 2 [LU]. It should be noted
that the nonloaded delay time is added to the propagation delay time, and that the rise and fall
of each output must also be taken into conside ration.
KNO2
• Example calculation for paths A
Cell
(1) Path A
(2) Path A
(3) Path A
(4) Path A
t
t
t
t
t
t
t
t
pd
pd
pd
pd
pd
pd
pd
pd
(A
(A
(A
Pin
(A
(A
(A
(A
(A
A1
Input
Table 5-3 Characteristics of Cells (Power-Supply Voltage of 3.3 V)
P : t
B : t
C : t
D : t
Fan-in
P
P
P
P
C
C
D
D
1.0
pd
pd
pd
pd
)
)
)
)
)
)
)
)
= t
= t
= t
= t
pd
pd
pd
pd
= T
= 41 + 15.0
= 131 (ps)
= T
= 42 + 20.9
= 167.4 (ps)
= t
= 131.0 + T
= 131.0 + 32
= 163 (ps)
= t
= 167.4 + T
= 167.4 + 32
= 199.4 (ps)
= t
= 131.0 + T
= 131.0 + 57
= 188.0 (ps)
= t
= 167.4 +T
= 167.4 + 59
= 226.4 (ps)
= t
= 131.0 + T
= 131.0 + 75
= 206.0 (ps)
= t
= 167.4 + T
= 167.4 + 51
= 218.4 (ps)
Pin
(KIN1) + t
(KIN1)
(KIN1) + t
(KIN1) + t
X
pd
pd
pd
pd
pd
pd
0
0
Output
+ K
+ K
(A
(A
(A
(A
(A
(A
Fan-out
B, A
8.9
(Load A + Load B)
(Load A + Load B)
0
pd
0
0
pd
0
pd
0
0
EPSON
(KIN2)
P
P
P
P
P
(KNA2)
(KNO2)
(4+2)
(4+2)
P
Chapter 5: Propagation Delay Time and Timing Design
C, A
) + t
) + t
) + t
) + t
) + t
) + t
From
A1
pd
pd
pd
pd
pd
pd
D (t
(P
(P
(P
(P
(P
(P
pd
To
X
= Typ.)
B
B
C
C
D
D
t
pd
)
)
)
)
)
Edge
)
(Typ.)
T
0
75
51
(ps)
K (ps/LU)
40.6
14.2
69
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