TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 94

• Manufacturer Part Number: TMP86xy48UG/FG
• Manufacturer: Toshiba

Specifications of TMP86xy48UG/FG

• Package: LQFP64/QFP64
• Rom Types (m=mask,p=otp,f=flash): F/E
• Rom Size: 32
• Ram Size: 2K
• Driver Led: 11
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: 1
• High-speed Serial Output: 2
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 16
• Da Converter Channels: -
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 54
• Power Supply (v): 2.7 to 3.6

(0015H)
(0014H)
TC5DR
TC5CR
R/W
2.10.2
Note 1: fc: High-frequency clock [Hz], fs: Low-frequency clock [Hz], *: Don’t care
Note 2: Values to be loaded to the timer register must satisfy the following condition.
Note 3: When TC5 operation is started (TC5S = “0” → “1”) or TC5 operation is stopped (TC5S = “1” → “0”), do not
Note 4: Available source clocks for each operation mode is referred to the following table.
Note 5: The TC5S is automatically cleared to “0” after starting STOP mode.
Note 6: If a read instruction is executed for TC5CR, read data of bits 7 and 6 are unstable.
Note 7: During TC5 operation except PWM mode, do not change TC5DR.
Control
8-bit timer register 5 (TC5DR). Reset does not affect TC5DR.
7
7
TC5CK
TC5M
TC5S
TC5CK
The timer/counter 5 is controlled by a timer/counter 5 control register (TC5CR) and an
change TC5CR <TC5M, TC5CK>. Also, during TC5 operation (TC5S = “1” → “1”), do not change TC5CR
<TC5M, TC5CK>.
6
6
TC5 start control
TC5 source clock select [Hz]
TC5 operating mode select
000
001
010
011
100
101
110
111
TC5S
Figure 2.10.2 Timer Register 5 and TC5 Control Register
5
5
1 ≤ TC5DR ≤ 255
Timer mode
4
4
TC5CK
○
○
○
○
×
×
×
×
3
3
2
2
Event counter mode
86FM48-90
1
1
0: Stop and counter clear
1: Start
000
001
010
011
100
101
110
111
00: Timer/event counter mode
01: Reserved
10: Programmable divider output (PDO) mode
11: Pulse width modulation (PWM) output mode
TC5M
○
×
×
×
×
×
×
×
0
0
DV7CK = 0
(Initial value: 1111 1111)
(Initial value: **00 0000)
fc/2
fc/2
fc/2
fc/2
fc/2
fc/2
NORMAL1/2, IDLE1/2
fc
11
7
5
3
2
PDO mode
External clock (TC5 pin input)
mode
○
○
○
×
×
×
×
×
DV7CK = 1
fs/2
fc/2
fc/2
fc/2
fc/2
fc/2
fc
3
7
5
3
2
PWM mode
○
○
○
○
×
×
×
×
SLOW1/2,
SLEEP1/2
fs/2
mode
−
−
−
−
−
−
3
TMP86FM48
2007-08-24
R/W