TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 50

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TMP86xy48UG/FG

Manufacturer Part Number
TMP86xy48UG/FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP86xy48UG/FG

Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
F/E
Rom Size
32
Ram Size
2K
Driver Led
11
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
1
High-speed Serial Output
2
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
54
Power Supply (v)
2.7 to 3.6
Note 1: Do not access reserved areas by the program.
Note 2: −: Cannot be accessed.
Note 3: Write-only registers and interrupt latches cannot use the read-modify-write instructions (Bit manipulation
Figure 2.1.2 The Special Function Register (SFR) for TMP86FM48 (2/2)
instructions such as SET, CLR, etc. and logical operation instructions such as AND, OR, etc.).
Address
1F80 H
DA
DB
DC
DD
DE
EC
ED
D8
D9
DF
EA
EB
EE
EF
FA
FB
FC
FD
FE
E0
E1
E2
E3
E4
E5
E6
E7
E8
E9
F0
F1
F2
F3
F4
F5
F6
F7
F8
F9
FF
(UART received data buffer)
P0PRD (P0 Terminal input)
P1PRD (P1 Terminal input)
P2PRD (P2 Terminal input)
P3PRD (P3 Terminal input)
P5PRD (P5 Terminal input)
UARTSR (UART status)
EEPSR (FLASH status)
SBISR (SBI status)
EEPEVA (FLASH write emulation time control)
RDBUF
Read
P7CR1 (P7 Port input/output control)
P8CR (P8 Port input/output control)
P2OUTCR (P2 Port output control)
86FM48-46
P7CR2 (P7 Port input control)
SBIDBR (SBI data buffer)
EEPCR (FLASH control)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
STOPCR (Key-on wake-up control)
UARTCR1 (UART control 1)
UARTCR2 (UART control 2)
(UART transmit data buffer)
SBICRA (SBI control 1)
SBICRB (SBI control 2)
I2CAR (I2C address)
TDBUF
Write
TMP86FM48
2007-08-24

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