TMP86xy48UG/FG Toshiba, TMP86xy48UG/FG Datasheet - Page 145
TMP86xy48UG/FG
Manufacturer Part Number
TMP86xy48UG/FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP86XY48UGFG.pdf
(207 pages)
Specifications of TMP86xy48UG/FG
Package
LQFP64/QFP64
Rom Types (m=mask,p=otp,f=flash)
F/E
Rom Size
32
Ram Size
2K
Driver Led
11
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
1
High-speed Serial Output
2
Adc 8-bit Channels
-
Adc 10-bit Channels
16
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
2
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
54
Power Supply (v)
2.7 to 3.6
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2.15 10-Bit AD Converter (ADC)
VAREF
AIN00
AIN01
AIN06
AIN07
AIN10
AIN11
AIN16
AIN17
AVDD
2.15.1 Configuration
The TMP86FM48 has a 10-bit successive approximation type AD converter.
a DA converter, a sample-and-hold circuit, a comparator, and a successive comparison
circuit.
Analog input multiplexer
The circuit configuration of the 10-bit AD converter is shown in Figure 2.15.1.
It consists of control registers ADCCR1 and ADCCR2, registers ADCDR1 and ADCDR2,
A
B
G
H
I
J
O
P
EN
S
Y
AINDS
SAIN
Figure 2.15.1 AD Converter (ADC)
AD converter control register1, 2
4
ADCCR1
ADRS
Sample hold
circuit
R/2
86FM48-141
AMD
2
R
Control circuit
DA converter
IREFON
ADCCR2
clock
Shift
ACK
Analog
comparator
3
Reference
voltage
Successive approximate circuit
ADCDR1
AD conversion result register
R/2
10
8
2
ADCDR2
EOCF ADBF
VSS
TMP86FM48
2007-08-24
INTADC
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