SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 705

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SAM3N0C

Manufacturer Part Number
SAM3N0C
Description
Manufacturer
Atmel Corporation
Datasheets
35.3.2.2
35.3.3
11011A–ATARM–04-Oct-10
Active Mode Power Consumption
Wait Mode
Figure 35-7.
Table 35-11
Table 35-11. Typical Current Consumption in Wait Mode
The Active Mode configuration and measurements are defined as follows:
Note:
• Core Clock and Master Clock Stopped
• Current measurement as shown in the above figure
• All Peripheral clocks deactivated
• VDDIO = VDDIN = 3.3V
• VDDCORE = 1.8V (Internal Voltage regulator used) and 1.62V (external supply)
• T
• Recursive Fibonacci Algorithm or division operation running from Flash memory
• All Peripheral clocks are deactivated.
• Master Clock (MCK) running at various frequencies with PLL or the fast RC oscillator
• Current measurement on AMP1 (VDDCORE)
See
There is no activity on the I/Os of the
A
= 25° C
1. Recursive Fibonacci is a high computation test whereas division operation is a low computa-
Figure 35-7 on page 705
tion test.
gives current consumption in typical conditions.
Measurement Setup for Wait Mode
3.3V
Conditions
device.
@25°C
AMP2
AMP1
Consumption
VDDOUT
VDDIN
VDDOUT
(AMP1)
5.7
VDDCORE
VDDIO
VDDPLL
Consumption
(AMP2)
Total
14.9
Regulator
Voltage
SAM3N
Unit
µA
705

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